Implementation of Interface Router Ip for Proteo Network-on-chip
نویسندگان
چکیده
The design of integrated circuits will change a lot in near future. Because of shorter time-to-market it is impossible to design all functional blocks from scratch. The system designers are moving into higher abstraction levels and usage of reusable IP (Intellectual Property) blocks is increasing. The communication between the IP blocks is of increasing importance and thus also be designed in a reliable and fast way. One proposed solution to this problem is to use Network-On-Chip (NoC) architectures, which are built up from reusable interconnect IP blocks. In this paper an interface router IP for Proteo network is introduced and implemented. Proteo is a NoC developed in Tampere University of Technology (TUT).
منابع مشابه
Design of a Low-Latency Router Based on Virtual Output Queuing and Bypass Channels for Wireless Network-on-Chip
Wireless network-on-chip (WiNoC) is considered as a novel approach for designing future multi-core systems. In WiNoCs, wireless routers (WRs) utilize high-bandwidth wireless links to reduce the transmission delay between the long distance nodes. When the network traffic loads increase, a large number of packets will be sent into the wired and wireless links and can...
متن کاملCongestion estimation of router input ports in Network-on-Chip for efficient virtual allocation
Effective and congestion-aware routing is vital to the performance of network-on-chip. The efficient routing algorithm undoubtedly relies on the considered selection strategy. If the routing function returns a number of more than one permissible output ports, a selection function is exploited to choose the best output port to reduce packets latency. In this paper, we introduce a new selection s...
متن کاملA Low Latency and Power ASIC Design of Modular Network Interfaces for Network on Chip
The implementation of a high-performance Network on Chip (NoC) requires an efficient design of the network interface (NI) unit that connects the switched network to the IP cores. However, different interfaces’ specification of integrated components and different flow control is used by NoC router raises a considerable difficulty for adopting NoC techniques. The architecture of NIs must be modul...
متن کاملA Review of Optical Routers in Photonic Networks-on-Chip: A Literature Survey
Due to the increasing growth of processing cores in complex computational systems, all the connection converted bottleneck for all systems. With the protection of progressing and constructing complex photonic connection on chip, optical data transmission is the best choice for replacing with electrical interconnection for the reason of gathering connection with a high bandwidth and insertion lo...
متن کاملDesign of a Multicast Router for Network-on-chiparchitectures with Irregular Topologies
As chip complexity keeps increasing in system-on-chip (SoC), the on-chip interconnect has become a critical issue for large-scale chip design. It has been proposed that the packet-switched network exchanging messages between intellectual property (IP) cores is a viable solution for the SoC interconnect problem. The design of the router in such network-on-chip (NoC) architectures is the key to h...
متن کامل